With the remarkable advances in semiconductor technologies, the electronics industry has been through a very rapid revolution from thick to thin films, and further to ever increasing miniaturization. Semiconductor packaging, which is the science of establishing interconnections with the semiconductor devices to form circuits, has been developed concurrently with the rapid advances in the semiconductor and electronics industries.
Semiconductor packaging usually includes a lead frame that is a structure providing electrical interconnections to one or more semiconductor devices, such as an integrated circuits (IC) die. Typically, the die attached to the lead frame is electrically connected to the leads of the lead frame with wires through a wire bonding process, and an encapsulating material can be used to cover and seal the lead frame, wires, and IC die therein to complete the packaging process. The main purpose of packaging is to ensure that the semiconductor devices and interconnections are packaged efficiently and reliably.
Recently, flip chip mounting has become a popular technique for directly and electrically connecting an integrated circuit chip to a substrate. More specifically, during the manufacturing process, solder bumps are deposited on the top side of the chip surface and the chip is flipped over to align the electrical bond pads on the chip with corresponding electrical bond pads on the substrate. The flip chip and the substrate are then heated to cause the solder to melt and wet the electrical bond pads of the substrate to complete the interconnection. The substrate and flip chip are then cooled to solidify the solder thereby forming the desired electrical connections. Conventionally, once the flip chip is bonded to the substrate, an underfill material, which is typically provided as a liquid adhesive resin that can be dried or polymerized, is dispensed between the chip and the substrate. The underfill material provides enhanced mechanical adhesion and mechanical and thermal stability between the flip chip and the substrate, and prevent the chip and substrate surfaces from environmental interferences.
A sectional view of a conventional flip chip structure 10 can be seen on FIG. 1A, which includes a chip 101 with an active face facing down, a plurality of bumps 105 that is used to electrically connect to leads 103 of a lead frame (not shown). When the chip 101 is slightly pressed down and heated for being further secured on the leads 103, the bump 105 may be deformed since it has not been completely solidified. Moreover, the bump 105 may spread (see 107 in FIG. 1B) to a bottom surface of the lead 103 which may create unnecessary interconnection between the chip 101 and the bottom surface of the lead 103, and further lead to a failure in packaging. This problem may also occur when the bump of the flip chip is implanted into a conductive paste on the lead 103 since the conductive paste may as well spread to cause failure in packaging. Therefore, there remain a need for a new and improved lead frame structure that can be used for receiving and confining overflowed materials to avoid failure in the packaging process.